astra/f1c100s

The code defines the physical pin layout, labels, and footprint for the F1C100S system-on-chip (SoC) component used in electronic devices.

Version
0.9.2
License
unset
Stars
0

src/generated/lcd_right_storage_bottom.metrics.json

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{
  "profile": "lcd_right_storage_bottom",
  "inputHash": "1e0cfa3789b7e26e0a8be2c9892863597406463ccf38c68b6f2494d40b0bfd3b",
  "moduleSizeMm": 28,
  "rules": {
    "traceWidth": 0.12,
    "clearance": 0.1,
    "viaDiameter": 0.45,
    "viaDrill": 0.2,
    "layers": 4
  },
  "platedTestPoints": 71,
  "nonTopExitContacts": 69,
  "traces": 176,
  "wireSegments": 982,
  "vias": 216,
  "capacitors": 32,
  "localDecouplers": 15,
  "routedLengthMm": 1411.254,
  "usbDmLengthMm": 8.251748,
  "usbDpLengthMm": 8.251805,
  "usbSkewMm": 0.000057,
  "drcErrors": 0,
  "optimization": {
    "before": {
      "platedTestPoints": 71,
      "nonTopExitContacts": 69,
      "traces": 176,
      "wireSegments": 3185,
      "vias": 274,
      "capacitors": 32,
      "localDecouplers": 15,
      "routedLengthMm": 1515.267,
      "usbDmLengthMm": 8.251748,
      "usbDpLengthMm": 8.251805,
      "usbSkewMm": 0.000057
    },
    "after": {
      "platedTestPoints": 71,
      "nonTopExitContacts": 69,
      "traces": 176,
      "wireSegments": 982,
      "vias": 216,
      "capacitors": 32,
      "localDecouplers": 15,
      "routedLengthMm": 1411.254,
      "usbDmLengthMm": 8.251748,
      "usbDpLengthMm": 8.251805,
      "usbSkewMm": 0.000057
    }
  }
}